Commit b2768ee6 authored by unknown's avatar unknown
Browse files

Merge serg:Abk/mysql-5.1 into janus.mylan:/usr/home/serg/Abk/mysql-5.1

parents 9baac37a 948caab0
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+4 −2
Original line number Diff line number Diff line
@@ -15,11 +15,13 @@
   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA */

#if defined(__i386__) || defined(_M_IX86)

#ifdef MY_ATOMIC_MODE_DUMMY
#  define LOCK ""
#else
#  define LOCK "lock"
#endif

#ifdef __GNUC__
#include "x86-gcc.h"
#elif defined(_MSC_VER)
@@ -27,7 +29,7 @@
#endif
#endif

#ifdef make_atomic_add_body
#ifdef make_atomic_cas_body

typedef struct { } my_atomic_rwlock_t;
#define my_atomic_rwlock_destroy(name)
+12 −6
Original line number Diff line number Diff line
@@ -20,19 +20,25 @@
  architectures support double-word (128-bit) cas.
*/

#define MY_ATOMIC_MODE "gcc-x86" ## LOCK
#ifdef MY_ATOMIC_NO_XADD
#define MY_ATOMIC_MODE "gcc-x86" LOCK "-no-xadd"
#else
#define MY_ATOMIC_MODE "gcc-x86" LOCK
#endif

/* fix -ansi errors while maintaining readability */
#ifndef asm
#define asm __asm__
#endif

#ifndef MY_ATOMIC_NO_XADD
#define make_atomic_add_body(S)					\
  asm volatile (LOCK "xadd %0, %1;" : "+r" (v) , "+m" (*a))
  asm volatile (LOCK "; xadd %0, %1;" : "+r" (v) , "+m" (*a))
#endif
#define make_atomic_swap_body(S)				\
  asm volatile ("xchg %0, %1;" : "+r" (v) , "+m" (*a))
  asm volatile ("; xchg %0, %1;" : "+r" (v) , "+m" (*a))
#define make_atomic_cas_body(S)					\
  asm volatile (LOCK "cmpxchg %3, %0; setz %2;"			\
  asm volatile (LOCK "; cmpxchg %3, %0; setz %2;"		\
               : "+m" (*a), "+a" (*cmp), "=q" (ret): "r" (set))

#ifdef MY_ATOMIC_MODE_DUMMY
@@ -45,9 +51,9 @@
*/
#define make_atomic_load_body(S)				\
  ret=0;							\
  asm volatile (LOCK "cmpxchg %2, %0"				\
  asm volatile (LOCK "; cmpxchg %2, %0"				\
               : "+m" (*a), "+a" (ret): "r" (ret))
#define make_atomic_store_body(S)				\
  asm volatile ("xchg %0, %1;" : "+m" (*a) : "r" (v))
  asm volatile ("; xchg %0, %1;" : "+m" (*a) : "r" (v))
#endif
+1 −1
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@@ -26,7 +26,7 @@
#ifndef _atomic_h_cleanup_
#define _atomic_h_cleanup_ "atomic/x86-msvc.h"

#define MY_ATOMIC_MODE "msvc-x86" ## LOCK
#define MY_ATOMIC_MODE "msvc-x86" LOCK

#define make_atomic_add_body(S)				\
  _asm {						\
+20 −6
Original line number Diff line number Diff line
@@ -22,10 +22,17 @@
#include "atomic/nolock.h"
#endif

#ifndef my_atomic_rwlock_init
#ifndef make_atomic_cas_body
#include "atomic/rwlock.h"
#endif

#ifndef make_atomic_add_body
#define make_atomic_add_body(S)					\
  int ## S tmp=*a;                                              \
  while (!my_atomic_cas ## S(a, &tmp, tmp+v));                  \
  v=tmp;
#endif

#ifdef HAVE_INLINE

#define make_atomic_add(S)					\
@@ -87,15 +94,15 @@ extern void my_atomic_store ## S(int ## S volatile *a, int ## S v);

#endif

make_atomic_add( 8)
make_atomic_add(16)
make_atomic_add(32)

make_atomic_cas( 8)
make_atomic_cas(16)
make_atomic_cas(32)
make_atomic_cas(ptr)

make_atomic_add( 8)
make_atomic_add(16)
make_atomic_add(32)

make_atomic_load( 8)
make_atomic_load(16)
make_atomic_load(32)
@@ -116,13 +123,20 @@ make_atomic_swap(ptr)
#undef make_atomic_load
#undef make_atomic_store
#undef make_atomic_swap
#undef intaptr
#undef make_atomic_add_body
#undef make_atomic_cas_body
#undef make_atomic_load_body
#undef make_atomic_store_body
#undef make_atomic_swap_body
#undef intptr

#ifdef _atomic_h_cleanup_
#include _atomic_h_cleanup_
#undef _atomic_h_cleanup_
#endif

typedef int32 intptr; /* TODO configure check */

#define MY_ATOMIC_OK       0
#define MY_ATOMIC_NOT_1CPU 1
extern int my_atomic_initialize();
+1 −0
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@@ -36,6 +36,7 @@
*/
int my_atomic_initialize()
{
  DBUG_ASSERT(sizeof(intptr) == sizeof(void *));
  /* currently the only thing worth checking is SMP/UP issue */
#ifdef MY_ATOMIC_MODE_DUMMY
  return my_getncpus() == 1 ? MY_ATOMIC_OK : MY_ATOMIC_NOT_1CPU;