Loading BitKeeper/etc/logging_ok +1 −0 Original line number Diff line number Diff line mwagner@evoq.mwagner.org sasha@mysql.sashanet.com heikki@donna.mysql.fi innobase/configure.in +5 −0 Original line number Diff line number Diff line Loading @@ -95,6 +95,11 @@ case "$target_os" in CFLAGS="$CFLAGS -DUNIV_MUST_NOT_INLINE";; esac case "$target" in i[[4567]]86-*-*) CFLAGS="$CFLAGS -DUNIV_INTEL_X86";; esac AC_OUTPUT(Makefile os/Makefile ut/Makefile btr/Makefile buf/Makefile com/Makefile data/Makefile dict/Makefile dyn/Makefile Loading innobase/include/sync0sync.ic +14 −0 Original line number Diff line number Diff line Loading @@ -86,6 +86,20 @@ mutex_test_and_set( /* mutex_fence(); */ return(res); #elif defined(__GNUC__) && defined(UNIV_INTEL_X86) ulint* lw; ulint res; lw = &(mutex->lock_word); /* In assembly we use the so-called AT & T syntax where the order of operands is inverted compared to the ordinary Intel syntax. The 'l' after the mnemonics denotes a 32-bit operation. */ asm volatile("movl $1, %%eax; xchgl (%%ecx), %%eax" : "=eax" (res): "ecx" (lw)); return(res); #else ibool ret; Loading Loading
BitKeeper/etc/logging_ok +1 −0 Original line number Diff line number Diff line mwagner@evoq.mwagner.org sasha@mysql.sashanet.com heikki@donna.mysql.fi
innobase/configure.in +5 −0 Original line number Diff line number Diff line Loading @@ -95,6 +95,11 @@ case "$target_os" in CFLAGS="$CFLAGS -DUNIV_MUST_NOT_INLINE";; esac case "$target" in i[[4567]]86-*-*) CFLAGS="$CFLAGS -DUNIV_INTEL_X86";; esac AC_OUTPUT(Makefile os/Makefile ut/Makefile btr/Makefile buf/Makefile com/Makefile data/Makefile dict/Makefile dyn/Makefile Loading
innobase/include/sync0sync.ic +14 −0 Original line number Diff line number Diff line Loading @@ -86,6 +86,20 @@ mutex_test_and_set( /* mutex_fence(); */ return(res); #elif defined(__GNUC__) && defined(UNIV_INTEL_X86) ulint* lw; ulint res; lw = &(mutex->lock_word); /* In assembly we use the so-called AT & T syntax where the order of operands is inverted compared to the ordinary Intel syntax. The 'l' after the mnemonics denotes a 32-bit operation. */ asm volatile("movl $1, %%eax; xchgl (%%ecx), %%eax" : "=eax" (res): "ecx" (lw)); return(res); #else ibool ret; Loading